Decoder circuit with missing clock generator

Details Decoder circuit with missing clock generator Decoder circuit with missing clock generator

1991-09-19

1992-05-19

Severin, David J.

Dynamic magnetic information storage or retrieval

General processing of a digital signal

Data clocking

360 40, G11B 509, G11B 2014

Patent

active

051153564

ABSTRACT:
An improved decoder circuit suitable for decoding an encoded binary data stream. The encoding is expected to generate a three-part code format, the format, in turn, comprising a pair of clock transitions that set-off a data transition. The improved decoder circuit establishes whether or not the expected format is in fact realized under arbitrary operating conditions, and in the event of a failure to realize the expected format, provides a suitable format for a subsequent decoding procedure.

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patent: 4964139 (1990-10-01), Wash et al.
patent: 4996608 (1991-02-01), Widney
patent: 5025328 (1991-06-01), Silva

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