Decoder circuit with a differential amplifier and applications t

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307449, H03K 19082, H03K 19094

Patent

active

052372170

ABSTRACT:
There is disclosed a decoder circuit applicable to a decoding circuit of a DRAM which is comprised of a differential amplifier, first and second differential amplification lines connected to the differential amplifier, a pair of P-channel transistors connected between the first and second lines to precharge them up to a predetermined voltage in response to a clock signal applied to gates thereof, and one N-channel transistor connected between the first line and a ground line the gate of which is connected to either of non-reversible and reversible address signal lines. There is also disclosed an address selection circuit as an application of the above mentioned decoder circuit.

REFERENCES:
patent: 4354175 (1982-10-01), Goldstein
patent: 4399372 (1983-08-01), Tanimoto et al.
patent: 4590388 (1986-05-01), Clemons et al.
patent: 5017812 (1991-05-01), Wu

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