Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1978-12-13
1981-05-12
Anagnos, Larry N.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307270, 307DIG5, 307482, 365230, H03K 19017, H03K 19096, G11C 800
Patent
active
042674646
ABSTRACT:
A decoder circuit including: a charge-up transistor for maintaining the content of an input address signal; a power supply switching transistor for controlling a charge-up current which is supplied to the charge-up transistor; a predetermined number of selection transistors which are connected at a connection point between the charge-up transistor and the power supply switching transistor so as to select an output word line, and; a bootstrap transistor which is connected to an opposite side of the connection point with respect to the charge-up transistor. The present invention enables the driving of the charge-up transistor with clock pulses having a potential level higher than the power supply line voltage V.sub.DD. The present invention also enables the driving of the power supply switching transistor by clock pulses having a potential level higher than V.sub.DD +V.sub.th wherein V.sub.+h equals the threshold voltage of the power supply switching transistor.
REFERENCES:
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patent: 3665473 (1972-05-01), Heimbigner
patent: 3795898 (1974-03-01), Mehta et al.
patent: 4048629 (1977-09-01), Bormann
patent: 4074237 (1978-02-01), Spampinato
patent: 4081699 (1978-03-01), Hirt et al.
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patent: 4145622 (1979-03-01), Hofmann et al.
Parikh "High-Speed FET Decoder", IBM Tech. Discl. Bull., vol. 18, No. 12, pp. 3955-3956, 5/1976.
De Simone "High-Speed FET Decoder Circuit", IBM Tech. Discl. Bull., vol. 17, No. 10, pp. 2835-2836, 3/1975.
Nakano Masao
Takemae Yoshihiro
Anagnos Larry N.
Fujitsu Fanuc Limited
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