Decoder

Dynamic information storage or retrieval – Control of storage or retrieval operation by a control... – Control of information signal processing channel

Reexamination Certificate

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C369S053350, C369S059260, C369S124080

Reexamination Certificate

active

07035182

ABSTRACT:
A decoder for improving the reliability of synchronization pattern detection. The decoder includes a synchronization circuit for detecting a synchronization pattern from LPP data and wobble data. A first frame counter is reset when a synchronization detection circuit detects the synchronization pattern of a first sector and counts the number of frames of data until the synchronization pattern of the next sector is detected. A comparison circuit compares a count value of the first frame counter with a first reference value, which corresponds to the number of frames for one sector. A determination circuit determines whether or not the detected synchronization pattern is proper based on the comparison result of the comparison circuit.

REFERENCES:
patent: 5604723 (1997-02-01), Kikuta
patent: 6263469 (2001-07-01), Jang
patent: 6272194 (2001-08-01), Sakamoto
patent: 6707626 (2004-03-01), Esumi
patent: 6879771 (2005-04-01), Yoshida et al.
patent: 2003/0086348 (2003-05-01), Takahashi
patent: 2003178535 (2003-06-01), None
Patent Abstracts of Japan, Publication No. 2001-236738, Date of Publication: Aug. 31, 2001, Application No. 2000-046965, 9 pages.

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