Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data
Reexamination Certificate
2006-12-01
2010-06-15
Liu, Shuwang (Department: 2611)
Pulse or digital communications
Synchronizers
Synchronizing the sampling time of digital data
C375S373000, C375S354000, C370S503000, C370S509000, C370S512000
Reexamination Certificate
active
07738614
ABSTRACT:
A circuit includes: a portion for performing a logical operation based on a binary modulated signal and a cyclic signal; serial-to-parallel converter for sampling a operation output for parallel output; correlation filter having multiple digital filters for allowing the parallel signal values to pass therethrough; maximum difference detector for detecting a maximum difference in a period during which a difference between the maximum and minimum output signal values from digital filters is greater than a threshold; timing detector for detecting the inversion timing of each output signal value; and decision timing exterminating portion for determining decision timing based on the maximum difference and the detected inversion timing.
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Lam Kenneth
Liu Shuwang
Oki Semiconductor Co., Ltd.
Studebaker Donald R.
Studebaker & Brackett PC
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