Decision-feedback equalizer with maximum-likelihood sequence...

Pulse or digital communications – Equalizers – Automatic

Reexamination Certificate

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Reexamination Certificate

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06707850

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to digital communications, and more particularly, to Decision-Feedback Equalization (DFE) and Maximum-Likelihood-Sequence-Estimation (MLSE) in a digital receiver.
BACKGROUND OF THE INVENTION
Digital communication systems, such as standard telephone twisted pair loops or wireless radio communication systems, are used to convey a variety of information between multiple locations. With digital communications, information is translated into a digital or binary form, referred to as bits, for communication purposes. A pair of binary bits form a symbol. A transmitter maps the bit stream into a modulated symbol stream, converts the modulated symbol stream to a signal and transmits the signal. A digital receiver receives the signal, down converts the signal to a low frequency signal, samples the low frequency signal and maps the sampled signal back into an estimate of the information.
The communication environment presents many difficulties that effect communications. For example, dispersion occurs, wherein crosstalk or other noise disturbances may give rise to signal errors. To reduce the errors, it is known that a Maximum-Likelihood-Sequence-Estimation (MLSE) equalizer may be employed. Such an equalizer considers various hypotheses for the transmitted symbol sequence, and, with a model of the dispersive channel, determines which hypothesis best fits the received data. This can be realized using the Viterbi Algorithm. This equalization technique is well-known to those skilled in the art, and can be found in standard text books such as J. G. Proakis, Digital Communications, 2d ed., NY: McGraw-Hill, chapter 6, 1989.
A receiver is described in an article in IEEE Transactions on Information Theory, January 1973, pages 120-124, F. R. Magee, Jr. and J. G. Proakis: “Adaptive Maximum-Likelihood Sequence estimation for Digital Signaling in the presence of Intersymbol Interference”. The article describes a channel equalizer which includes a viterbi analyzer having an adaptive filter as a channel estimating circuit. Received symbols are compared successively with hypothetical symbols and those hypothetical symbols which coincide closest with the received symbols are selected successively to form an estimated symbol sequence. The parameters of the adaptive filter are adjusted successively to the changed channel, with the aid of the selected, decided symbols. A description of the viterbi algorithm is given in an article by G. David Forney, Jr.: “The Viterbi Algorithm” in Proceedings of the IEEE, Vol. 61, No. 3, March 1973. The article also describes in some detail the state and state transitions of the Viterbi algorithm and also how these state transitions are chosen to obtain the most probable sequence of symbols.
However, the MLSE equalizer is highly complex because, for example, the MLSE equalizer is based upon the assumption that symbol interference extends over the entire transmitted message and that the communication channel varies with time. Thus, implementation of the MLSE is expensive, requires a lot of hardware and/or software resources, and is power-consuming. Accordingly, a decision feedback equalizer (DFE) is known as an alternative to the MLSE. DFE arrangements are advantageous in that they exhibit low computational complexity. U.S. Pat. No. 5,353,307 to Lester et al. and other publications disclose adaptive equalizers for simulcast receivers that employ Lattice-DFE and Kalman-DFE techniques.
Hybrid arrangements that combine various equalization techniques have also been proposed. For example, an article by W. U. Lee and F. S. Hill, Jr.: “A Maximum-Likelihood Sequence Estimator with Decision-Feedback Equalization,” in IEEE transactions on communications, September 1977, proposes a DFE as a pre-filter which limits the complexity of a MLSE implemented by the Viterbi algorithm for channels having a long impulse response. However, the proposed scheme has a disadvantage of feeding the DFE with slicer output. This may cause error propagation in the delay line and affect the performance of the MLSE.
SUMMARY OF THE INVENTION
In view of the foregoing background, it is therefore an object of the invention to improve the performance of a decision-feedback equalizer (DFE) by reducing error propagation in the delay line.
This and other objects, features and advantages in accordance with the present invention are provided by a DFE including a first summing node having a first input for receiving an input signal, a second input for receiving a second feedback signal, and an output. A maximum likelihood sequence estimator (MLSE) for estimating a symbol sequence has an input connected to the output of the first summing node, and has an output. A second summing node has a first input connected to the output of the first summing node, a second input for receiving a first feedback signal, and an output. The DFE also includes a signal level decoder having an input connected to the output of the second summing node, and a delay line. The delay line includes a first plurality of taps being connected to the output of the signal level decoder, and generating respective first tap signals based upon respective first coefficients, and a second plurality of taps being connected to the output of the MLSE, and generating respective second tap signals based upon respective second coefficients. Furthermore, the DFE has a first summing circuit for summing the first tap signals to generate the first feedback signal, a second summing circuit for summing the second tap signals to generate the second feedback signal, and an error signal generator having a first input connected to the input of the signal level decoder, and a second input connected to the output of the signal level decoder for adjusting the first and second coefficients.
The MLSE preferably has a partial output, and the delay line further comprises a third tap connected to the partial output of the MLSE. The partial output of the MLSE outputs a partially estimated signal based upon the estimated symbol sequence. The third tap generates a third tap signal based upon a third coefficient, and the first summing circuit may sum the first and third tap signals to generate the first feedback signal. Also, the MLSE preferably estimates the symbol sequence based upon the M-algorithm.
Objects, features and advantages in accordance with the present invention are also provided by a method of estimating symbol sequences of an input signal comprising a plurality of symbols. The method includes summing an input signal and a second feedback signal to generate a first summed signal, and summing the first summed signal with a first feedback signal to generate a second summed signal. The second summed signal is level decoded to generate a decoded signal, and respective first tap signals are generated from the decoded signal based upon respective first coefficients. Also, the first tap signals are combined to form the first feedback signal. Second tap signals are generated from a symbol output signal based upon respective second coefficients, and the second tap signals are combined to form the second feedback signal. A maximum likelihood sequence estimation is performed for estimating a symbol sequence of the first summed signal to provide the symbol output signal.
Also, an error signal may be generated based upon the second summed signal and the decoded signal for adjusting the first and second coefficients. Furthermore, performing the maximum likelihood sequence estimation may comprise generating a partial output signal, and a third tap signal may be generated from the partial output signal based upon a third coefficient. The partial output signal comprises a partially estimated signal based upon the estimated symbol sequence. Here, the sum of the first and third tap signals forms the first feedback signal. Moreover, the maximum likelihood sequence estimation is preferably based upon the M-algorithm.


REFERENCES:
patent: 5020078 (1991-05-01), Crespo
patent: 5283811 (1994-02-01), Chennakeshu et al.
patent: 5353307 (1994-

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