Decision-feedback equalizer for digital communication system

Pulse or digital communications – Equalizers – Automatic

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Details

375348, H03H 730, H03K 5159, H04B 110

Patent

active

057486743

ABSTRACT:
An improved decision-feedback equalizer for a digital communication system, which is capable of preventing performance degradation which occurs due to a pipelining delay, includes a feed forward filter, a subtractor, a slicer, first and second feedback filters, and an adder. The feed forward filter filters out a precursor ISI signal from a digital signal. The subtractor subtracts a summation ISI signal from the digital signal output by the feed forward filter, and the slicer slices the output of the subtractor into symbols having a predetermined size. The first feedback filter has a predetermined number of pipelining delays, and filters the output from the slicer to generate a first post-cursor ISI signal. The second feedback filter also filters the output of the slicer to generate a second post-cursor ISI signal within the predetermined pipelining delay number of the first feedback filter without a pipelining delay. The adder adds the first and second post-cursor ISI signals to generate the summation ISI signal.

REFERENCES:
patent: 5031194 (1991-07-01), Crespo et al.
patent: 5293402 (1994-03-01), Crespo et al.
patent: 5345476 (1994-09-01), Tsujimoto
patent: 5471504 (1995-11-01), Lee et al.

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