Boots – shoes – and leggings
Patent
1995-09-27
1997-11-18
Elmore, Reba I.
Boots, shoes, and leggings
36472401, 36472403, G06F 1717
Patent
active
056894490
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
The present invention relates to a decimation filter comprising a cascade arrangement of the following elements in the given order:
M.sub.1 digital first order integration stages having a clock rate F.sub.s and a delay of one clock cycle,
M.sub.2 digital second order integration stages having a clock rate F.sub.2 and a delay of two clock cycles,
a decimation stage for decreasing the sampling frequency of the output signal from the last integration stage by a predetermined decimation ratio K,
M digital derivation stages having a clock rate F.sub.s /K, each comprising a delay element stage for delaying the input signal for one clock cycle and a subtractor element stage for subtracting the input signal from the output signal of the delay element, wherein M=M.sub.1 +2M.sub.2.
A decimation filter is a digital filter wherewith the sampling frequency of a signal is decreased (decimated) by a number K (normally an integer) which is called the decimation ratio. A decimation filter is typically used in connection with an oversampling A/D or D/A converter (e.g. sigma-delta converter) to decrease the output sampling frequency of the converter.
Decimation can in principle be performed in one stage comprising a low-pass filter and a unit taking every K:th sample from the output of the low-pass filter, K being the decimation ratio. The filtering response of the low-pass filter must be such that the information carried by the output signal of the filter fits into the band according to the new sampling frequency. A problem attendant the decimation carried out in one stage will be that a low-pass filter having a very steep and narrow-band frequency response is needed. This problem has traditionally been overcome by performing the filtering and decimation in several stages, so that the product of the decimation ratios K.sub.1, K.sub.2, . . . K.sub.n of the different decimation stages is the requisite decimation ratio K stated above. Thus the requirements on the characteristics of the low-pass filters required in the individual stages are relieved and their number of order is decreased so that the overall number of order in the low-pass filters of the different stages is only a fraction of that of a corresponding single-stage implementation. This is particularly the case when the decimation ratio M is high, e.g. >50.
The computationally efficient first stage for multistage decimators is provided by a transfer function ##EQU1## where 2.sup.-P is a scaling constant. It can be used as a first stage with decimation factor K in cases where the overall decimation factor D can be realized in the product been described for instance in the article E. B. Hogenauer, "An economical class of digital filters for decimation and interpolation", in IEEE Trans. Acoust. Speech Signal Processing, pp. 155-162, vol. ASSP-29, April 1981. One known decimator structure satisfying the transfer function according to equation 1 is shown in FIG. 1. The decimator requires only 2M adders and 2M delay elements and no multiplying operations. Furthermore, FIG. 1 shows a scaling element 12 and a decimation block 13 forwarding only every K:th sample. It should be noted that if 1's or 2's complement arithmetic (or modulo arithmetic in general) and the worst-case scaling are used, the output values of a filter H(z) implemented as shown in FIG. 1 are correct even though internal overflows were to occur in the feedback loops realizing the term 1/(1-z.sup.-1). Furthermore, under the above conditions the effect of temporary miscalculations vanishes from the output in finite time and initial resetting is not necessarily needed. The scaling constant 2.sup.-P has to satisfy the condition
The integer M for the prior art filter structure has to be selected in such a way that H(z) provides the required attenuation in the frequency bands decimator. Herein F.sub.s is the input sampling frequency. The prior art structure shown in FIG. 1 is attended by the disadvantage that the zeros produced by the transfer function thereof are located at frequ
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Eerola Ville
Husu Timo
Ingalsuo Seppo
Pajarre Eero
Ritoniemi Tapani
Elmore Reba I.
Patel Ramesh
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