Decimating digital finite impulse response filter

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G06F 1531

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051915472

ABSTRACT:
A decimation type digital filter which utilizes the thinned-out signal of a finite impulse response (FIR) filter having N taps for processing the signal by the product sum operation of filter coefficients and the input signals inputted at every first period, in which, on the basis of the ratio K between a first period which is the input signal period and an output signal period and the number of taps N, M (a value obtained by raising below the decimal point of N/K) registers are provided and M successive output signals are processed by the product sum operation in parallel by respective registers, whereby the input signal is not necessarily to be held, a capacity of the register may be minimized and processing may be effected once for each register during the first period or by M number of times of product sum operation in total, thus the operating speed can be reduced to 1/K and the capacity and the operating speed can be optimized.

REFERENCES:
patent: 4337518 (1982-06-01), Ohnishi et al.
patent: 4521866 (1985-06-01), Petit et al.
patent: 4561065 (1985-12-01), Matsuda
patent: 4802111 (1989-01-01), Barkan et al.

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