Decimal adder

Details Decimal adder Decimal adder

1974-10-11

1976-01-27

Morrison, Malcolm A.

Registers

Transfer mechanism

Traveling pawl

235168, G06F 750

Patent

active

039354385

ABSTRACT:
A decimal adder has plural arithmetic stages, each for generating one new bcd digit, and a controller for all stages. Each stage has three, four-stage binary adders one as input receiver for one input bcd digit, one main adder and one as output corrector. The input adder adds six to that one input bcd digit for a true addition, the output adder adds ten (or subtracts 6) selectively under various conditions. The second bcd digit for a stage is either passed directly to the main adder or its 16- complement; the second input for the main adder is the output of the input adder. The output of the main adder is either fed directly or its 16- complement to the output adder. The controller controls selectivity of operation of input adders and complement input formation in all stages in response to equal or unequal sign bits. The controller controls formation of complement of the output of all main adders when the overall result is negative but not because both sign bits are negative. The add-ten of the output adder in each stage is controlled on the basis of the carry bit generated by the main adder in the particular stage and in response to the sign of the overall result. The carry in - carry out chain from stage to stage is closed in a loop through the controller, generating a carry-in bit for the subtract operation when the resultant sign is positive. This loop represents the sign of overall result in case of subtraction.

REFERENCES:
patent: 3189735 (1965-06-01), Gunderson et al.
patent: 3629565 (1971-12-01), Schmookler et al.
patent: 3711693 (1973-01-01), Dahl
patent: 3752394 (1973-08-01), Igel

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