Patent
1997-06-19
1999-11-02
Teska, Kevin J.
39550044, 39550049, G06F 9455
Patent
active
059785845
ABSTRACT:
A debugging apparatus is disclosed which verifies a program to be embedded into a target machine by running the program in an environment which is one or the target machine, an emulator, and a simulator. Each environment includes operation state information of the program and inputs and outputs the operation state information in a form unique to the environment. The debugging apparatus includes; target environment storing unit for storing an identification name of the target environment; receiving unit for receiving a command from an operator; instruction detecting unit for detecting a certain instruction in the command; specifying unit for, when the certain instruction is detected, specifying a target environment specified by the identification name as a source target environment and for specifying any of the rest of the environments as a destination target environment; reading unit for reading operation state information from the source target environment; converting unit for converting the operation state information into operation state information written in a form unique to the destination target environment; setting unit for setting the converted operation state information in the destination target environment; and operation resuming unit for resuming the operation of the program in the destination target environment.
REFERENCES:
patent: 5768567 (1998-06-01), Klein et al.
patent: 5838948 (1998-11-01), Bunza
patent: 5841967 (1998-11-01), Sample et al.
Borgatti et al, "A Smoothly Upgradable Approach to Virtual Emulation of HW/SW Systems," Proceedings of the Seventh IEEE International Workshop on Rapid System Prototyping, pp. 83-88, Jun. 1996.
Iwamura Yoshiyuki
Nishibata Motohide
Sumi Fumio
Broda Samuel
Matsushita Electric - Industrial Co., Ltd.
Teska Kevin J.
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