Debug circuit of a signal processor

Details Debug circuit of a signal processor Debug circuit of a signal processor

1993-07-23

1994-11-01

Beausoliel, Jr., Robert W.

Excavating

371 19, 371 162, 36426791, G06F 1134, G06F 1100, G06F 722

Patent

active

053613481

ABSTRACT:
A debug program is decoded in a command decoder to generate a debug start signal. Then, a signal processing operation is halted and a state of an internal circuit is latched and read to be supplied to an external circuit. When the reading of the state starts, a signal-processing continuation signal is generated, so that the signal processing operation is restored to be continued. Therefore, the debug program can be inserted to a program memory at plural addresses without braking the signal processing operation.

REFERENCES:
patent: 4308581 (1981-12-01), Raghunathan
patent: 4881228 (1989-11-01), Shauda
patent: 4924382 (1990-05-01), Shauda
patent: 5047926 (1991-09-01), Kuo et al.
patent: 5053949 (1991-10-01), Allison et al.
patent: 5084814 (1992-01-01), Vaglica et al.
patent: 5257269 (1993-10-01), Hamauchi

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