Deadlock prevention in a two bridge system by flushing write buf

Details Deadlock prevention in a two bridge system by flushing write buf Deadlock prevention in a two bridge system by flushing write buf

1996-02-26

1998-06-09

Sheikh, Ayaz R.

395309, 395287, G06F 1314

Patent

active

057649332

ABSTRACT:
A method for preventing deadlocks is used in a computing system in which a host bus is connected to a first input/output bus through a first bridge and the first input/output bus is connected to a second input bus through a second bridge. When transferring data from a first input/output device on the second input/output bus to a memory on the host bus, the first input/output device requests mastership of the second input/output bus. Before granting mastership to the first input/output device, the second bridge instructs the first bridge to flush and disable write buffers within the first bridge. After the write buffers have been flushed, the first input/output device is granted mastership of the second input/output bus. The second bridge requests mastership of the first input/output bus by asserting a request signal on a request line. The first bridge then obtains mastership of the host bus in order to allow the transfer of the data from the first input/output device to the memory. In the present invention, the second bridge instructs the first bridge to flush and disable write buffers within the first bridge by asserting and deasserting in a first pattern the request signal.

REFERENCES:
patent: 5475854 (1995-12-01), Thomsen et al.
patent: 5535341 (1996-07-01), Shah et al.
patent: 5596729 (1997-01-01), Lester et al.
patent: 5613075 (1997-03-01), Wade et al.
patent: 5625779 (1997-04-01), Solomon et al.

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