De-interleave circuit for regenerating digital data

Details De-interleave circuit for regenerating digital data De-interleave circuit for regenerating digital data

1995-04-07

1996-06-18

Beausoliel, Jr., Robert W.

Excavating

371 21, G06F 1100, H03M 1300

Patent

active

055286089

ABSTRACT:
In a digital data regenerating apparatus for regenerating digital data, while correcting errors in the data, which is formed of a predetermined number of words corresponding to 1 frame and input in parallel, a de-interleave circuit comprises a demodulator circuit for demodulating digital data, a buffer RAM for temporarily storing demodulated output data output from the demodulator circuit, an error correcting circuit for receiving data from the buffer RAM through an input circuit, a microprogram sequencer, and a pointer setting circuit controlled by the microprogram sequencer. An error correcting flag is correspondently set up for each set of data formed of a plurality of words and, in a plurality of operating modes in which an error correcting flag is attached to each set of different data, the addresses for setting data to the pointers are made different such that error correction is achieved by the use of a common microprogram in the plurality of operating modes.

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