De-embedding devices under test

Data processing: measuring – calibrating – or testing – Testing system – Of circuit

Reexamination Certificate

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C702S118000, C702S126000, C324S638000

Reexamination Certificate

active

06961669

ABSTRACT:
A system for de-embedding electrical characteristics to obtain the intrinsic electrical characteristics of a device under test. The system includes obtaining a set of S parameter data from measurements of a thru test structure and partitioning that set into a set of input S parameters and a set of output S parameters. The set of input S parameters and the set of output S parameters are converted to sets of input ABCD parameters and output ABCD parameters, respectively. An inverse matrix of the set of input ABCD parameters is cascaded with a matrix of a set of ABCD parameters representative of the electrical characteristics of a test structure including the device under test. The resultant matrix is then cascaded with the inverse matrix of the set of output ABCD parameters to obtain a set of device ABCD parameters representative of the intrinsic electrical characteristics of the device under test.

REFERENCES:
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patent: 6665628 (2003-12-01), Martens
patent: 6744262 (2004-06-01), Adamian
patent: 6832170 (2004-12-01), Martens
patent: 2002/0167304 (2002-11-01), Di Gregorio et al.
Kolding, “A Four-Step Method for De-Embedding Gigahertz On-Wafer CMOS Measurements,”IEEE Transactions on Electronic Devices, Apr. 2000, vol. 47, No. 4, pp. 734-740.
Koolen et al., “An Improved De-Embedding Technique for On-Wafer High-Frequency Characterization,”IEEE 1991 Bipolar Circuits and Technology Meeting 8.1, 1991, pp. 188-191, no month.
Wu et al., “Unified Accurate CAD Models for RF, Microwave and Millimeter-Wave Integrated Circuits #,”Telsiks'99, Oct. 13-15, 1999, Nis, Yugoslavia, pp. 6-13.
“Agilent De-embedding and Embedding S-Parameter Networks Using a Vector Network Analyzer, Application Note 1364-1,”Agilent Technologies, pp. 1-24, Mar. 22, 2001.

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