DDS pulse generator architecture

Details DDS pulse generator architecture DDS pulse generator architecture

2007-10-16

2007-10-16

Ngo, Chuong D (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C708S272000

Reexamination Certificate

active

10739591

ABSTRACT:
A DDS pulse generator has an accumulator that accumulates a phase increment value to produce phase accumulator values, and has a lookup table that contains a digital representation of a pulse waveform such that a pulse output signal is produced from the lookup table in response to the phase accumulator values. To change a period of the pulse output signal without changing edge positions a programmable modulo value is used. An address mapper is situated between the accumulator and address lines of the lookup table to map the rising and falling edge portions of the phase accumulator values into large regions of the lookup table, while phase accumulator values corresponding to high and low logic levels are mapped into small regions of the lookup table. The resulting pulse output signal has easily independently controlled period and pulse width as well as rising and falling edge speeds. By making better use of the lookup table it is possible to generate very narrow pulses with low repetition rates or pulses in which the rise time and fall time are very different from the period.

REFERENCES:
patent: 5430764 (1995-07-01), Chren, Jr.
patent: 6066967 (2000-05-01), Cahill et al.
patent: 6249155 (2001-06-01), Hartman et al.
patent: 6307441 (2001-10-01), Sharpe

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