DCME unit capable of processing a wide variety of input informat

Multiplex communications – Wide area network – Packet switching

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370 53, 370 581, 370 79, 370 84, 370 856, H04J 302

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052572625

ABSTRACT:
In a DCME unit for use in assigning each of input digital signals arranged in each of input channels to a plurality of output channels in which output digital signals are arranged, respectively, a degree of priority is given to an assignment request in dependency upon a sequential order, a request species, and an input channel number. Each assignment request is successively selected from a higher degree of priority by a memorization control section to determine a bit rate to be encoded. Each input digital signal is encoded into an encoded digital signal by an encoder in accordance with the bit rate. The encoded digital signal is arranged into a selected one of the output channel by a high speed switching circuit to be sent to a transmission line together with an encoded assignment signal related to the request species and the input channel number. Flags may be used to draw out useless input channel numbers with the sequential order kept unchanged and to avoid double registration of the input channel numbers.

REFERENCES:
patent: 4045616 (1977-08-01), Sloane
patent: 4993022 (1991-02-01), Konda et al.
patent: 5005170 (1991-04-01), Nelson
patent: 5132966 (1992-07-01), Hayano et al.
Aranguren et al., "A Digital Time Division Switching Arrangement", PCT Application No.: PCT/US78/00001, Jun. 1, 1978.
Fourth International Conference on Digital Satellite Communications, Oct. 23-25, 1978, pp. 261-268.

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