Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
2002-03-18
2004-02-24
Patel, Rajnikant B. (Department: 2838)
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
C323S285000
Reexamination Certificate
active
06696825
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of electronic circuits and, more particularly, to a DC-to-DC converter having control loops for following load transients and associated methods.
BACKGROUND OF THE INVENTION
DC-to-DC power converters are widely used to supply power to electronic devices, such as in computers, printers, etc. Such DC-to-DC converters are available in a variety of configurations for producing a desired output voltage from a source voltage. For example, a buck or step down converter produces an output voltage that is less than the source voltage. A typical step down converter includes at least one power switch and a pulse width modulation circuit connected thereto to selectively connect the source voltage to an inductor to thereby power the load.
Unfortunately, rapidly changing load conditions may create output voltage transients. In other words, it may be difficult for the control circuitry of the DC-to-DC converter to provide a desired voltage to the load when the impedance of the load may be rapidly changing. In the past large filtering capacitors or capacitor banks, or more costly higher quality capacitors have been provided to filter the output voltage. U.S. Pat. No. 5,926,384 to Jochum et al., and assigned to the assignee of the invention, discloses an approach wherein current is selectively sourced to the load or sinked therefrom to reduce the need for filtering capacitors.
U.S. Pat. No. 5,617,016 to Borghi et al. discloses a DC-to-DC converter including a PWM regulation loop and a hysteretic control loop which are alternately enabled as a function of the load level. When the load drops below a preset limit, the converter switches from the PWM control mode to the hysteretic control mode. Accordingly, switching losses are reduced during periods of operation at the relatively low load level.
U.S. Pat. No. 6,052,298 to Wallace et al. discloses a noise suppression circuit for a DC-to-DC converter which includes multiple parallel feedback loops. A first loop sets the steady state output voltage. A second feedback loop cooperates with the first loop in an attempt to prevent the output voltage from exceeding a high voltage level. The third feedback loop cooperates with the first loop in an attempt to prevent the output voltage from dropping below a low voltage level. The second and third loops each operate in a linear mode in combination with the first control loop. Accordingly, although the converter may handle faster load transients, it may still not be sufficiently fast to follow fast load transients as may occur in powering certain rapidly changing loads, such as those associated with microprocessors and computers, for example.
SUMMARY OF THE INVENTION
In view of the foregoing background, it is therefore an object of the present invention to provide a DC-to-DC converter and associated methods to maintain a relatively constant output voltage even when experiencing relatively rapid load transients.
This and other objects, features and advantages in accordance with the present invention are provided by a DC-to-DC converter comprising a pulse width modulation (PWM) circuit cooperating with at least one power switch for supplying power from a source to a load over a range between a lower limit and an upper limit to thereby control an output voltage for the load. More particularly, the converter may include a primary feedback control loop cooperating with the PWM circuit for supplying power to the load between the lower and upper limits based upon the output voltage during normal conditions. The converter may also include at least one override feedback control loop cooperating with the PWM circuit for overriding the primary feedback control loop and supplying power to the load at one of the lower and upper limits based upon the output voltage during a corresponding relatively fast load transient condition. Accordingly, relatively fast load transients can be followed by the converter.
The at least one override feedback control loop may define at least one trip point based upon the output voltage for overriding the primary feedback control loop and supplying power to the load at one of the lower and upper limits. In some advantageous embodiments, the at least one trip point is selectable. For example, the converter may be in integrated circuit form and include an integrated circuit substrate. At least portions of the PWM circuit, the primary feedback control loop, and the at least one override feedback control loop may thus be formed in the integrated circuit substrate. In such embodiments, the at least one trip point may be selectable by external components from the integrated circuit substrate. A relatively small number of pins may also advantageously be used for this selectability option.
The at least one trip point may be based upon a magnitude of a change in the output voltage. Alternately, the at least one trip point may be based upon a rate of change of the output voltage. In still other variations, the the at least one trip point is advantageously based upon both a magnitude of a change in the output voltage and a rate of change of the output voltage.
The at least one override feedback control loop may comprise a positive override feedback control loop for supplying power to the load at the lower limit based upon a transient increase of the output voltage. In other words, as the power demanded by the load drops and the output voltage rises, the positive override feedback control loop will supply power to the load at the low limit. For example, the low limit may be a complete shut off of the at least one power switch. Conversely, the at least one override feedback control loop may comprise a negative override feedback control loop for supplying power to the load at the upper limit based upon a transient decrease of the output voltage. Of course, both override feedback control loops may be provided in yet other embodiments of the invention.
The at least one override feedback control loop may include a filter, and a comparator connected thereto. The comparator may have first and second inputs connected to the filter, with the first input also receiving a signal based upon the output voltage. The comparator may also have an output providing an override feedback control loop signal to the PWM circuit. In addition, the filter may include a resistor connected across the first and second inputs, and a capacitor connected between the second input and a voltage reference. A constant current circuit may also be connected to the second input of the comparator. Accordingly, the circuitry for implementing the fast transient feedback control is relatively straightforward.
Another aspect of the invention relates to a method for operating a DC-to-DC converter. The converter may comprise at least one power switch, a PWM circuit cooperating with the at least one power switch for supplying power from a source to a load, and a primary feedback control loop cooperating with the PWM circuit for supplying power to the load between lower and upper limits based upon the output voltage during normal conditions. The method may also include overriding the primary feedback control loop with at least one override feedback control loop for supplying power to the load at one of the lower and upper limits based upon the output voltage during a corresponding relatively fast load transient condition.
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Article/Data sheet by Intersil entitled Microprocessor COR
Harris Matthew Burdet
Isham Robert Haynes
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Intersil America's Inc.
Patel Rajnikant B.
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