DC removal circuit for digital signal

Pulse or digital communications – Multilevel

Patent

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Details

375293, H04L 2534, H04L 2549

Patent

active

054757142

ABSTRACT:
A DC removal circuit for removing residual DC from a digitally encoded signal including a plurality of multi level data symbols occurring at a constant symbol rate and formatted in repetitive data fields, each including repetitive data segments having data segment sync. A derived value is subtracted from each of the received data symbols. The output of the subtractor is sampled, at a rate that is less than the symbol rate, and the sampled output is accumulated in an accumulator for generating the derived value. The sampling is synchronized with the data segment sync to avoid sampling the data segment sync and the accumulator is disabled until data segment lock is achieved.

REFERENCES:
patent: 4071829 (1978-01-01), Davis et al.
patent: 4972189 (1990-11-01), Polito et al.

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