Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control
Reexamination Certificate
1999-04-13
2001-02-27
Wells, Kenneth B. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Amplitude control
C327S378000, C330S009000
Reexamination Certificate
active
06194941
ABSTRACT:
TECHNICAL FIELD
The present invention relates generally to DC offset compensation circuits, and more specifically to such circuits operable to minimize an aggregate DC offset voltage attributable to a signal amplifying circuit.
BACKGROUND OF THE INVENTION
Systems for controlling speed, torque and/or position of DC motors are known and have been widely used in a variety of applications including automotive control systems. Generally, such DC motors fall into two broad categories; namely brushed DC motors and brushless DC motors. While brushless DC motors typically offer desirable performance features and certain advantages over brushed DC motors in an automotive environment, such features and advantages may often be offset by the complexity of motor control and motor drive circuits required to accurately control motor operation. For example, controlled stoppage, accurate motor shaft positioning, motor reversal and consistent control of motor output torque are all difficult to achieve with brushless DC motors.
Dedicated systems for controlling and driving brushless DC motors are known. In such systems, a motor control circuit is typically operable to detect motor shaft position as well as motor drive current, and a motor drive circuit is, in turn, responsive to motor control signals supplied by the motor control circuitry to drive the DC motor in a desired manner. In known DC motor control systems, the motor control circuit typically includes a number of motor position sensors for providing a corresponding number of signals indicative of motor position as well as a sense amplifier operable to amplify one or more signals corresponding to motor drive current. The motor control circuit is typically responsive to motor position and/or motor drive current to provide the motor control signals to the motor drive circuit. Generally, the resolution of the motor control circuit is dependent upon the performance of the sense amplifier as well as the accuracy of the motor position detection circuitry. However, sense amplifiers of the type typically used in DC motor control systems are commonly configured for high DC gain, and due to mismatching in gain stage devices as well as other sources of error, such sense amplifiers may accordingly exhibit an unacceptably large amplified DC offset voltage error. This DC offset voltage error results in a degradation of the maximum dynamic range of the motor control circuit and hence the resolution of the system.
While known DC offset voltage compensation circuits have been used in various amplifier circuits, such DC offset voltage compensation circuits suffer from a number of drawbacks. For example, one known DC offset voltage compensation circuit is disclosed in U.S. Pat. No. 4,356,450 to Masuda, and includes a mechanical switch connected to a first one of the amplifier inputs and positionable between an input signal to be amplified and a reference potential. A DC offset compensation circuit is connected between the amplifier output and the remaining input of the amplifier. In order to perform a DC offset compensation cycle, the Masuda circuit undesirably requires actuation of the switch to thereby replace the signal to be amplified at the first input of the amplifier with the reference potential. The DC offset compensation circuit thereafter forces a compensating DC voltage onto the remaining amplifier input that is of sufficient magnitude to null the amplifier output voltage. The switch is once again actuated to thereby replace the reference signal at the first input of the amplifier with the signal to be amplified, wherein the amplifier is thereafter operable with the compensating DC voltage impressed upon the remaining input thereof.
While the Masuda DC offset voltage compensation circuit may be acceptable in some applications, inclusion of a mechanical switch may not be desirable in other applications, including certain automotive applications, due at least in part to reliability and cost concerns. Moreover, in some applications, it may not be desirable to divert the signal to be amplified from the sense amplifier during powered conditions. What is therefore needed is an improved DC offset compensation approach for a signal amplifier that minimizes an aggregate DC offset voltage attributable to a signal amplifier while minimizing required mechanical and/or electromechanical componentry. Ideally, such an improved DC offset compensation approach should allow DC offset compensation cycles to be performed without interrupting the signal amplifying operation of the amplifier.
SUMMARY OF THE INVENTION
The present invention addresses the foregoing shortcomings in known DC offset compensation circuits. In accordance with one aspect of the present invention, a DC offset compensation circuit for a signal amplifier comprises a signal amplifier producing a first analog signal, a reference circuit producing a second analog signal, a comparator circuit responsive to the first and second analog signals to produce a comparator output signal as a function thereof, a counter circuit responsive to a first state of the comparator output signal to periodically update a digital count value thereof and to a second state of said comparator output signal to maintain a current value of said digital count value, and a converter circuit responsive to the digital count value to produce a third analog signal corresponding thereto, wherein the signal amplifier is responsive to the third analog signal to minimize a DC offset voltage attributable thereto.
In accordance with another aspect of the present invention, a method of compensating for a DC offset voltage attributable to a signal amplifier comprises the steps of providing an analog output signal of a signal amplifier and an analog reference signal to first and second inputs respectively of a comparator, periodically updating a digital count value of a counter in response to a first state of a comparator output signal of the comparator, maintaining a current value of the digital count value in response to a second state of the comparator output signal, converting the digital count value to an analog compensation signal, and providing the analog compensation signal to the signal amplifier, wherein the signal amplifier is responsive to the analog compensation signal to minimize a DC offset voltage attributable thereto.
One object of the present invention is to provide an improved DC offset compensation circuit for minimizing an aggregate DC offset voltage attributable to a signal amplifying circuit.
Other objects of the present invention will become more apparent from the following description of the preferred embodiment.
REFERENCES:
patent: 4356450 (1982-10-01), Masuda
patent: 4912714 (1990-03-01), Hatanaka et al.
patent: 5053877 (1991-10-01), Kondo et al.
patent: 5463410 (1995-10-01), Uchiyama et al.
patent: 5644127 (1997-07-01), Ohmae
patent: 6038432 (2000-03-01), Onoda
Castillo-Borelly Pedro Enrique
Hulka William Joseph
Keyse Mark Russell
Zarabadi Seyed Ramezan
Delphi Technologies Inc.
Funke Jimmy L.
Wells Kenneth B.
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