DC offset cancellation in a zero if receiver

Telecommunications – Receiver or analog modulated signal frequency converter – Local control of receiver operation

Reexamination Certificate

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Details

C455S250100

Reexamination Certificate

active

07110734

ABSTRACT:
This invention describes how to quickly cancel DC offsets that are present in the two quadrature paths of a zero intermediate frequency transceiver. Previously known techniques are not suitable for the 5 GHz WLAN standards because of the very short transmit to receive turn around times and extraordinarily large dc offsets in these systems. This invention solves the above problems. The present invention uses both AC and DC coupling along with automatic gain control techniques to remove unwanted DC offsets within an acceptable time period. The invention further uses a digital signal processor to estimate and subtract out the DC offset errors using time averaged signals. The digital signal processing circuit is capable of further AC filtering and Analog to Digital conversions.

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patent: WO 01/47105 (2001-06-01), None

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