DC offset cancel circuit

Details DC offset cancel circuit DC offset cancel circuit

2005-11-22

2005-11-22

Vuong, Quochien B. (Department: 2685)

Telecommunications

Receiver or analog modulated signal frequency converter

Noise or interference elimination

C455S063100, C455S067130, C455S296000, C455S338000, C455S552100, C327S307000

Reexamination Certificate

active

06968172

ABSTRACT:
This invention is applied to dual mode provided receiver capable of coinciding with both TDMA system and the non-TDMA system so as to provide a DC offset cancel circuit preferable for each communication method having a compact structure. In case where a predetermined time slot is allocated as an offset quantity detection time in the TDMA system, a first feedback loop is activated and corresponding to detection signals corresponding to differential output signals OUT, XOUT by a comparator2,a detection result is updated in the holding section3according to a strobe signal STB and held therein. Output signals from the holding section3are fed back to an amplifier1through a selection section5and a DC offset is cancelled out. In case where the offset quantity is detected successively, a second feedback loop is activated and then, detection signals from the comparator2are identified by a filter section4,and fed back to the amplifier1through the selection portion5,so that the DC offset is cancelled out.

REFERENCES:
patent: 4902979 (1990-02-01), Puckette, IV
patent: 5548244 (1996-08-01), Clewer
patent: 5724653 (1998-03-01), Baker et al.
patent: 5734975 (1998-03-01), Zele et al.
patent: 6516185 (2003-02-01), MacNally
patent: 6535561 (2003-03-01), Boesch et al.

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