Dc/dc power processor with distributed rectifier stage

Electric power conversion systems – Current conversion – Including d.c.-a.c.-d.c. converter

Reexamination Certificate

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C363S017000, C363S089000

Reexamination Certificate

active

06388898

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to isolated dc/dc converters. In particular, this invention relates to low output voltage, high output current, isolated dc/dc converters that has multiple rectifier stages connected in parallel.
2. Discussion of the Related Art
In a high-power application, by connecting several substantially identical converter power stages in a parallel configuration to share the total power processed, one can often achieve a desired output power using smaller, lower-rated magnetic and semiconductor components. With several power stages connected in parallel, the power losses and thermal stresses on the magnetic and semiconductor components are distributed among the parallel power stages, thus improving conversion efficiency and eliminating “hot spots”. In addition, because lower-power, faster semiconductor switches can be used to implement the parallel power stages, the parallel power stages may be operated at a higher switching frequency than that of a corresponding single high-power stage. Consequently, the parallel configuration reduces the required sizes of the magnetic components and increases conversion power density. In addition, because the parallel power stages can be operated at a higher switching frequency, this approach can be used to optimize the transient response of a power supply.
FIG. 1
shows converter
100
with two forward-converter power stages
101
and
102
connected in parallel. Generally, a power supply with parallel power stages requires more power stage and control circuit components. However, if the parallel converters share the same output filter, the number of power stage components can be reduced, such as illustrated by converter
200
of FIG.
2
. Similarly, if transformer secondary windings are provided directly in parallel, required power stage components can also be reduced, such as illustrated by converter
300
of FIG.
3
. Converters
200
and
300
of
FIGS. 2 and 3
are discussed in “Analysis, Design, and Evaluation of Forward Converter with Distributed Magnetics—Interleaving and Transformer Paralleling,” (“Zhang”) by M. T. Zhang, M. M. Jovanovic and F. C. Lee, published in
IEEE Applied Power Electronics Conf
. (
APEC
)
Proc
., pp. 315-321, 1995.
Regardless of the approach used in connecting power stages in parallel, ensuring that an acceptable load current (hence, power) is shared among the parallel modules is the main design challenge of such an approach. In fact, without an acceptable current-sharing mechanism, the load current can be unevenly distributed among the parallel modules. As a result, the modules that carry higher currents are electrically and thermally stressed more than the other modules, thus reducing the reliability of the power supply. Moreover, when the current of a parallel module exceeds its current limit, such as may occur when the converter current is unevenly distributed, the entire power supply may need to be shut off. Therefore, many current-sharing techniques of different complexities and performance are developed to ensure a relatively even current distribution among parallel modules. A discussion of some of these techniques is found in “A Classification and Evaluation of Paralleling Methods for Power Supply Modules,” by S. Luo, Z. Ye, R. L. Lin, and F. C. Lee, published in
IEEE Power Electronics Specialists' Conf. Rec
., pp. 901-908, 1999. For example, relatively even current sharing in converters
100
and
200
in
FIGS. 1 and 2
can be achieved by equalizing the peak values of primary currents in the modules. Furthermore, the performance of converter
100
and
200
of
FIGS. 1 and 2
can be further improved by interleaving (i.e., operating the primary switches in each converter with 180° phase shift). Generally, as discussed by Zhang above, interleaving provides some input current and output current ripple cancellation, thus reducing the size of the input and output filters.
Referring to
FIG. 3
, steady-state current sharing among parallel transformers
301
and
302
of converter
300
is determined by the winding resistances of transformers
301
and
302
. Because winding resistance is usually comparable with the layout resistance, the current sharing performance of parallel transformers is sensitive to circuit layout. Sensitivity to layout resistance can be reduced by including a rectifier in the secondary side of each transformer, such as shown in converter
400
of FIG.
4
. In converter
400
, current sharing is determined by the on-resistances of rectifiers
401
and
402
, as a rectifier's resistance is usually larger than that of a printed circuit board (PCB) trace resistance. However, because the on-resistance of silicon rectifiers has a negative temperature coefficient (i.e., the rectifier's resistance decreases as the temperature of the rectifier increases), a current runaway condition may exist. In a runaway condition, all the secondary current flows through one of the rectifiers and the associated transformer secondary windings. The runaway condition in converter
400
can be avoided if low on-resistance MOSFETs (which have positive on-resistance temperature coefficients) are used instead of the diode rectifiers, as it is routinely done in low-voltage high-current applications.
In a low output voltage (e.g., below 3.3 V), high output current (e.g., above 50 A) application that requires transformer isolation, secondary-side conduction loss dominates total loss and limits conversion efficiency. Therefore, to increase conversion efficiency, rectification and transformer winding losses must be reduced. Rectification loss can be reduced, for example, by replacing Schottky rectifiers with MOSFET synchronous rectifiers. Reduction of transformer winding loss can be achieved by reducing winding resistance and the root-mean-square (rms) current in the winding, respectively, by properly selecting the winding geometry and transformer structure, and by employing a current-doubler topology. These techniques are discussed for example in “Design and Performance Evaluation of Low-Voltage/High-Current Dc/Dc On-Board Modules,” (“Panov”) by Y. Panov, M. M. Jovanovic, published in
IEEE Applied Power Electronics Conf
. (
APEC
)
Proc
., pp. 545-552, 1999, and in “The Performance of the Current Doubler Rectifier with Synchronous Rectification,” by L. Balogh, published in
High Frequency Power Conversion Conf. Proc
., pp. 216-225, 1995.
FIG. 5
shows an example of a 1.45-volt, 70-ampere dc/dc converter
500
that employs a current-doubler topology implemented with synchronous rectifiers. (Converter
500
is discussed in the Panov reference mentioned above). In converter
500
, synchronous rectifier
501
and
502
are each implemented by connecting three low on-resistance MOSFETs in parallel. The technique used in converter
500
, however, cannot be extended to higher current levels by simply adding more synchronous rectifier MOSFETs, because the incremental reduction in conduction losses is less than the incremental increase of switching losses due to charging and discharging of MOSFETs' relatively large intrinsic terminal capacitances. If the switching frequency were not reduced, conversion efficiency would be reduced. However, reduction of switching frequency requires an undesirable increase in the sizes of magnetic components. In addition, the packaging of a large number of paralleled synchronous rectifiers is also difficult.
The output current of converter
500
of
FIG. 5
can be increased without efficiency degradation by connecting in parallel two or more power stages, as illustrated in converter
600
of FIG.
6
. However, converter
600
requires significantly more power-stage and control circuit components to achieve even current (hence, power) sharing among the parallel modules. The additional components increase both the size and the cost of the converter.
SUMMARY OF THE INVENTION
According to the present invention, a parallel technique, which substantially reduces the number of power-stage and control-circuit c

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