DC-DC converter circuit selecting lowest acceptable input...

Electrical transmission or interconnection systems – Plural supply circuits or sources – Selective or optional sources

Reexamination Certificate

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Details

C307S082000

Reexamination Certificate

active

06404076

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a DC-DC converter circuit for converting DC voltage to another DC voltage, a power supply selection circuit for selecting one of a plurality of power supplies, and an apparatus provided with such a DC-DC converter circuit.
2. Description of the Related Art
Many of portable type of electronic apparatuses such as a note personal computer and the like are so arranged that they operate from electric power obtained from a commercial power supply and a battery incorporated therein as well.
Usually, such an apparatus incorporates therein a circuit for changing over as to which source of electric power, the commercial power supply or the battery, is used to operate the apparatus (for example, Japanese Patent Laid Open Gazette Hei.9-182288, and Japanese Patent Laid Open Gazette Hei.9-308102). According to such type of circuit, when electric power obtained from the commercial power supply is supplied to the apparatus, this electric power takes precedence in use, and when the circuit detects that the supply of power from the commercial power supply stops, the supply of power changes to the supply of power from the battery. As another type of the power supply switching circuit, a circuit is arranged in such a manner that, in view of the fact that electric power obtained from the commercial power supply is generally higher in voltage than that from the battery, the supply of power selected is from the electric power of the highest voltage of the plurality of electric powers.
Incidentally, the voltage of a battery decreases as the battery discharges. Thus, an apparatus is provided with a DC-DC converter circuit for maintaining the voltage of electric power used in the apparatus.
FIG. 7
is a circuit diagram showing a first example of a linear regulator. The linear regulator is one type of a DC-DC converter circuit, and it is generally widely used.
A linear regulator section
10
is loaded on an LSI having an input terminal IN through which electric power of input voltage Vin is applied. The linear regulator section
10
converts the electric power of the input voltage Vin to electric power of output voltage Vout (Vin>Vout) lower than the input voltage Vin, and outputs electric power of the output voltage Vout through an output terminal OUT.
Between the input terminal IN and the output terminal OUT, an NPN transistor
11
for output voltage control is disposed, and between the input terminal IN and a base of the NPN transistor
11
, a constant current source
12
is disposed. A current outputted from the constant current source
12
flows through the base of the NPN transistor
11
in the form of a base current thereof, and further flows through a collector of an additional NPN transistor
13
in the form of a collector current thereof. An emitter of the NPN transistor
13
is connected to a ground terminal GND, which is grounded. The output voltage Vout of the output terminal OUT is fed to a plus input terminal of a differential amplifier
16
in the form of a potential division by two resistances
14
and
15
, while a reference voltage generated by a reference voltage source
17
is fed to a minus input terminal of the differential amplifier
16
. An output terminal of the differential amplifier
16
is connected to a base of the NPN transistor
13
.
In the event that the output voltage Vout of the output terminal OUT is biased with a voltage higher than a predetermined reference output voltage, the output voltage of the differential amplifier
16
increases, so that a collector current of the NPN transistor
13
increases. That is, of the current outputted from the constant current source
12
, one used as the collector current of the NPN transistor
13
increases, and as a result, the base current of the NPN transistor
11
for output voltage control decreases and thereby the output voltage Vout of the output terminal OUT decreases.
Conversely, in the event that the output voltage Vout of the output terminal OUT is biased with a voltage lower than a predetermined reference output voltage, the output voltage of the differential amplifier
16
decreases, so that the collector current of the NPN transistor
13
also decreases. That is, the base current of the NPN transistor
11
increases and thereby the output voltage Vout of the output terminal OUT increases.
In this manner, the electric power of a constant output voltage Vout is outputted from the output terminal OUT.
FIG. 8
is a circuit diagram showing a second example of a linear regulator. The following description sets forth the differences from the first example of the linear regulator shown in
FIG. 7
, hereinafter.
A linear regulator
10
′ shown in
FIG. 8
is provided with a PNP transistor
18
for output voltage control, instead of the NPN transistor
11
for output voltage control in the linear regulator
10
shown in FIG.
7
. As a result, the output voltage Vout of the output terminal OUT is fed to the minus input terminal of the differential amplifier
16
in form of a potential division by two resistances
14
and
15
, while the reference voltage generated by the reference voltage source
17
is fed to the plus input terminal of the differential amplifier
16
.
In the event that the output voltage Vout of the output terminal OUT is biased with a voltage higher than a predetermined reference output voltage, the output voltage of the differential amplifier
16
decreases, so that a collector current of the NPN transistor
13
also decreases. That is, of the current outputted from the constant current source
12
, one used as the collector current of the NPN transistor
13
decreases, and as a result, the base current of the PNP transistor
18
decreases and thereby the output voltage Vout of the output terminal OUT decreases.
Conversely, in the event that the output voltage Vout of the output terminal OUT is biased with a voltage lower than a predetermined reference output voltage, the output voltage of the differential amplifier
16
increases, so that the collector current of the NPN transistor
13
also increases. That is, the base current of the PNP transistor
18
increases and thereby the output voltage Vout of the output terminal OUT increases.
In this manner, an electric power of a constant output voltage Vout is outputted from the output terminal OUT.
FIG. 9
is a circuit diagram showing a third example of a linear regulator.
A main difference from the second example of the linear regulator shown in
FIG. 8
is that the PNP transistor
18
is replaced by P channel MOS transistor
19
. With respect to circuit operation, it is the same as that of the second example shown in
FIG. 8
, and thus a redundant explanation will be omitted.
FIG. 10
is a circuit diagram showing an example of a switching regulator. The switching regulator
20
is also a type of DC-DC converter circuit, and it is generally widely used.
An electric power of voltage Vin is fed through an input terminal IN of the switching regulator, and an electric power of output voltage Vout (here dealing with a step-down type and thus Vin>Vout) is outputted from a second output terminal OUT
2
, of first and second output terminals OUT
1
and OUT
2
. Between the first and second output terminals OUT
1
and OUT
2
, an outside coil
31
is connected. Between the second output terminals OUT
2
and the ground, an outside capacitor
32
is connected.
Elements of the switching regulator
20
, except outside coil
31
and outside capacitance
32
, are loaded on an LSI.
Between the input terminal IN and the output terminal OUT
1
, P channel MOS transistor
21
is disposed. An output of a PWM comparator
26
is connected to a gate of the P channel MOS transistor
21
. An output of a differential amplifier
24
and an output of a triangle wave generator
27
are fed to the PWM comparator
26
. The PWM comparator
26
will be described later.
The voltage Vout of the second output terminal OUT
2
is fed to a minus input terminal of the differential amplifier
24
in

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