Electric power conversion systems – Current conversion – Including d.c.-a.c.-d.c. converter
Reexamination Certificate
2000-04-25
2001-01-30
Nguyen, Matthew (Department: 2838)
Electric power conversion systems
Current conversion
Including d.c.-a.c.-d.c. converter
Reexamination Certificate
active
06181579
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a DC—DC converter (forward converter) which comprises a MOSFET synchronous rectifying element, and is suitable for parallel operation.
2. Description of the Related Art
A circuit of a major part of a DC—DC converter (forward converter) comprising a synchronous rectifying element of a MOSFET is shown in FIG.
7
. The circuit is disclosed in Japanese Unexamined Patent Publication No. 9-51260, and is a type where an input side circuit is isolated from an output side circuit by a transformer
10
. In
FIG. 7
, one terminal of the primary coil
11
of the transformer
10
is connected to the anode of a DC input source
14
, and the other terminal of the primary coil
11
is connected to the drain of a main switching element Q
1
comprising a MOSFET. The source of the main switching element Q
1
is connected to the cathode of the DC input source
14
, and the gate of the main switching element Q
1
is connected to a pulse width control circuit
8
.
The secondary coil
12
of the transformer
10
is connected to a synchronous rectifier driving circuit
1
. The synchronous rectifier driving circuit
1
comprises a synchronous rectifier
2
on a rectification side comprising a MOSFET, an input capacitor
4
on the rectification side, and a clamp diode
6
on the rectification side, and one terminal side of the input capacitor
4
on the rectification side is connected to one terminal side of the secondary coil
12
, and the other terminal side of the input capacitor
4
on the rectification side is connected to the gate of the synchronous rectifier
2
on the rectification side. The drain of the synchronous rectifier
2
on the rectification side is connected with the other terminal of the secondary coil
12
, and between the gate and the source of the synchronous rectifier
2
on the rectification side, the clamp diode
6
on the rectification side is connected so as to have its cathode side connected to the gate of the synchronous rectifier
2
.
A connection of the secondary coil
12
to the input capacitor
4
on the rectification side is connected with an output terminal (+ side output terminal)
29
, and the source terminal of the synchronous rectifier
2
on the rectification side is connected with an output terminal (− side output terminal)
30
via a conductor line
31
. Between the conductor line
31
and an input terminal of a choke coil L, a diode D
1
is connected such that its cathode is connected to the choke coil, a smoothing capacitor
16
is connected between the conductor line
31
and an output terminal of the choke coil L, and a load is connected between the output terminals
29
and
30
. These connecting circuits of the secondary coil
12
, the synchronous rectifier driving circuit
1
, the diode D
1
, the choke coil L, and the smoothing capacitor
16
constitute a rectifying smoothing circuit
18
.
A voltage detecting terminal for detecting an output voltage is connected to an output terminal side of the choke coil L, and an output voltage detected by the voltage detecting terminal is applied to a comparator circuit
9
. The comparator circuit
9
compares the detected voltage applied from the voltage detecting terminal with a reference voltage, and a signal comprising the compared result is applied to a pulse width control circuit
8
. The pulse width control circuit
8
, receiving the signal from the comparator circuit
9
, controls a pulse width of a switch driving control signal to be applied to the main switching element Q
1
so as to have the output voltage at a fixed constant voltage.
When the main switching element Q
1
is turned on in this circuit, the secondary coil
12
outputs a voltage of the primary coil
11
in a ratio (n2
1) comprising the number n2 of turns of the secondary coil
12
relative to the number n1 of turns of the primary coil
11
. At this time, a voltage is generated in a direction from the input capacitor
4
on the rectification side toward the gate of the synchronous rectifier
2
on the rectification side, an electric charge is charged on an input capacitance C
iss
of the capacitor
4
on the rectification side and the synchronous rectifier
2
on the rectification side, and the synchronous rectifier
2
on the rectification side is turned on. A voltage outputted from the secondary coil
12
is rectified by the synchronous rectifier
2
of the rectification side and the diode D
1
, then smoothed by the choke coil L and the smoothing capacitor
16
, and supplied to a load as a DC output voltage V
out
in a substantially constant voltage. At this time, the diode D
1
stays in an off-state.
When the main switching element Q
1
is turned off, a voltage is generated at the secondary coil
12
in the opposite polarity as the voltage generated when the main switching element Q
1
is turned on, and the diode D
1
is turned on. In an on-period of the main switching element Q
1
(on-period of the synchronous rectifier
2
on the rectification side), the electric charge charged on the input capacitance C
iss
of the input capacitor
4
on the rectification side and the synchronous rectifier
2
on the rectification side is discharged, and the synchronous rectifier
2
on the rectification side is turned off. On the other side, the synchronous rectifier
2
on the rectification side is turned on when a voltage V
gs
across the gate and source of the synchronous rectifier
2
on the rectification side is at −Vf (Vf: a forward direction voltage drop of the clamp diode
6
on the rectification side) to cause an electric current to flow, and the minimum value of the voltage V
gs
across the gate and source of the synchronous rectifier
2
on the rectification side is clamped at −Vf. Consequently, the voltage across the gate and source of the synchronous rectifier
2
on the rectification side during the on-period of the synchronous rectifier
2
on the rectification side is maintained unchanged at a constant level, despite a change of the duty of the main switching element Q
1
.
In other words, when the electrostatic capacitance of the input capacitor
4
on the rectification side is C
2
, input capacitance of the synchronous rectifier
2
on the rectification side is Ciss, and an output voltage of the secondary coil
12
is V
2
, at the time of steady operation, the voltage Vgs across the gate and source of the synchronous rectifier
2
on the rectification side at the time when the main switching element Q
1
is on (when the synchronous rectifier
2
on the rectification side is on) is determined by the follwing equation, namely;
Vgs={C
2
/(Ciss+C
2
)}×V
2
As can be understood from the equation, by setting a ratio for C
iss
relative to C
2
at optimum, an optimum gate driving voltage of the synchronous rectifier
2
on the rectification side can be set, and as the optimum gate driving voltage can be maintained at the constant level irrespective of change of the duty of the main switching element Q
1
, by clamping action of the clamp diode
6
on the rectification side, there is an advantage that the gate driving loss of the synchronous rectifier
2
on the rectification side can be minimized.
Waveform A in
FIG. 4
is a gate driving waveform of a synchronous rectifier
2
on the rectification side in a circuit of the above-described conventional embodiment, and as can be understood from the waveforms, at a turned-on point of a switch, a spike voltage S caused by the leakage inductance of the transformer
10
is generated, and is applied across the gate and source of the synchronous rectifier
2
on the rectification side, and across the cathode and anode of the Diode D
1
. As the gate driving loss due to the spike voltage S increases with the increase of the leakage inductance of the transformer
10
, it is likely that breakdown of the synchronous rectifier
2
on the rectification side or the diode D
1
may be caused. Therefore, improvement thereof is desired.
As shown in
FIG. 8
, as an application mod
Matsumoto Tadahiko
Nagai Jun
Murata Manufacturing Co. Ltd.
Nguyen Matthew
Ostrolenk Faber Gerb & Soffen, LLP
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