DC/DC converter

Electricity: power supply or regulation systems – In shunt with source or load – Using choke and switch across source

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Details

323285, G05F 1613, H02M 3335

Patent

active

049029576

ABSTRACT:
A latch (29) is set by a clock (33) to turn on power switch (FET 5). The latch (29) is reset by high voltage comparator (21), by a 50 percent clock delay (35) and by a low-voltage-to-charging-current comparator (19). The voltage at turn-on is compared with a up-ramping reference (15) until it equals an operating reference (17). A temporary delay (pulse circuit 39 and gate 37) is provided before the low voltage comparison can be effective. The delay prevents response to parasitic effects across the power switch (5). Excess drive is prevented resulting from low output currents and malfunctions, and at turn-on.

REFERENCES:
patent: 3784893 (1975-01-01), Rando
patent: 3879647 (1975-04-01), Hamilton et al.
patent: 4672518 (1987-06-01), Murdock
patent: 4674020 (1987-06-01), Hill
patent: 4683529 (1987-07-01), Bucher, II
patent: 4712169 (1987-12-01), Albach
patent: 4814684 (1989-03-01), McCurdy
IBM Technical Disclosure Bulletin article entitled "Improved Switch Mode Power Supply Regulation by Eliminating Turn-off Spikes" vol. 31, No. 4, Sep. 1988, at pp. 97-98.
Siliconex Incorporated sales literature for Switchmode Controllers Si9110/Si9111.

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