DC calibration system for a digital-to-analog converter

Details DC calibration system for a digital-to-analog converter DC calibration system for a digital-to-analog converter

1990-08-22

1992-02-11

Pellinen, A. D.

Coded data generation or conversion

Converter calibration or testing

341118, H03M 110

Patent

active

050879146

ABSTRACT:
A calibration system for a digital-to-analog converter (DAC) includes a digital portion (10) having a interpolation section (14) for receiving the digital input and increasing the sampling frequency thereof for input to a delta-sigma modulator (16). A summing junction (24) is disposed between the interpolation circuit (14) and the delta-sigma modulator (16) to allow an offset voltage to be summed therewith. The offset value is stored in an offset register (26), which is controlled by a calibration control circuit (40). The output of the delta-sigma modulator (16) is input to an analog section (12), which is comprised of an analog filter (22) and an output amplifier (28). The output amplifier (28) is operable to sample the output of the analog filter (22) and feed this back to a gate (38). The gate (38) is activated during a calibration cycle to feed the comparator output back to the calibration control circuit (40). During the calibration cycle, the output is isolated by an isolation amplifier (32 ) and the analog output pad connected to ground by a switch (44) to provide a low impedance output on the analog output. The calibration control circuit (40) is operable to perform a binary search while sampling the output of the analog section (12) with the input to the interpolation circuit (14) forced to a logic low.

REFERENCES:
patent: 4222107 (1980-09-01), Mrozowski et al.
patent: 4272760 (1981-06-01), Prazak et al.
patent: 4829236 (1989-05-01), Brenardi et al.

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