DC balance compensation for AC-coupled circuits

Details DC balance compensation for AC-coupled circuits DC balance compensation for AC-coupled circuits

2004-12-09

2009-11-17

Liu, Shuwang (Department: 2611)

Pulse or digital communications

Receivers

Automatic baseline or threshold adjustment

C327S051000, C327S065000, C327S303000, C330S069000, C330S253000, C330S258000, C330S259000, C375S317000, C375S341000, C455S296000, C455S313000, C360S066000

Reexamination Certificate

active

07620121

ABSTRACT:
A receiver has a first input port and a second input port both coupled to a differential amplifier through first and second input capacitors. A bias circuit coupled to the core side of the first input capacitor and to the core side of the second input capacitor is configured to provide a selected voltage to at least one of the first input and the second input of the differential amplifier. In one embodiment, a common mode bias circuit provides a common mode voltage to both inputs of a differential amplifier. In a particular embodiment, a run length detector monitors the output of the differential amplifier and provides a run length feedback signal or an average bit density feedback signal to the set the selected voltage between periods of data reception.

REFERENCES:
patent: 4787094 (1988-11-01), Eguchi
patent: 5124673 (1992-06-01), Hershberger
patent: 6566944 (2003-05-01), Pehlke et al.
patent: 6683922 (2004-01-01), Hayami et al.
patent: 6721117 (2004-04-01), Briskin
patent: 7295855 (2007-11-01), Larsson et al.
patent: 2004/0075595 (2004-04-01), Rapp
patent: 2004/0189386 (2004-09-01), Nishimura
U.S. Appl. No. 10/659,971, filed Sep. 11, 2003, Boecker et al.

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