Electrical computers and digital processing systems: processing – Architecture based instruction processing
Patent
1997-11-03
2000-01-18
Kim, Kenneth S.
Electrical computers and digital processing systems: processing
Architecture based instruction processing
712 1, 712247, G06F 900
Patent
active
060165391
ABSTRACT:
A new datapath control logic for processors with ISA implemented employing hierarchically organized primitive operations is disclosed. The new datapath control logic includes a primary control unit (PCU) and at least one other auxiliary control unit (ACU). Together, the control units control the datapath of a processor to selectively execute hierarchically organized primitive operations to effectuate execution of user instruction streams constituted with instructions of an ISA. Each instruction of the ISA is implemented with one or more hierarchical organization units of the hierarchically organized primitive operations. In one embodiment, the at least one other auxiliary control unit includes a first, a second and a third auxiliary control unit equipped to assist the primary control unit in dynamic decision variable evaluations, determining state transitions for contexts/processes comprised of threads of the hierarchically organized primitive operations, and controlling processor input/output.
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Kim Kenneth S.
TeraGen Corporation
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