Data transmitting link

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Details

G06F 304

Patent

active

045091404

ABSTRACT:
A communication network (10) has a memory unit (20) accessable to all ports (16-0, 16-1, 16-2, 16-3) of the link with a plurality of local sections (62) each associated with one of the ports. Interconnections include a dual memory bus (28) with a common bus subsystem (36) providing access to a common memory section and a local bus subsystem (30) providing access to the local memory sections, the subsystems constructed to permit concurrent independent use. Memory access priority circuitry (68) designates for each memory operating cycle a port for current service and makes memory access available to other elements when not required by the designated port.

REFERENCES:
patent: 3530438 (1970-09-01), Mellen et al.
patent: 4071887 (1978-01-01), Daly et al.
patent: 4124891 (1978-11-01), Weller et al.
patent: 4164787 (1979-08-01), Aranguren

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