Data transmission system with multi-memory packet switch

Details Data transmission system with multi-memory packet switch Data transmission system with multi-memory packet switch

2007-08-07

2007-08-07

Kizou, Hassan (Department: 2616)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S428000, C370S465000

Reexamination Certificate

active

10325689

ABSTRACT:
A data transmission system comprising a packet switch module interconnecting LAN adapters, a plurality of input and output ports connected to the LAN adapters such that each pair of input and output ports defines a crosspoint within the switch module, and a memory block located at each crosspoint of the switch module for storing at least one data packet. At each clock time, a scheduler causes a data packet stored in a memory block, among all memory blocks corresponding to a given output port, to be transferred to that output port. The system further comprises a configuration interface mechanism for sending configuration data to the memory control means of memory blocks located at pre-determined crosspoints such that a packet received by corresponding input ports from an input adapter having a speed n times faster than an input adapter transmitting to a single input port is transferred to corresponding output ports at a speed which is n times the transfer speed between a single input port and a single output port.

REFERENCES:
patent: 5557607 (1996-09-01), Holden
patent: 5757795 (1998-05-01), Schnell
patent: 5982771 (1999-11-01), Caldara et al.
patent: 6195335 (2001-02-01), Calvignac et al.
patent: 6205145 (2001-03-01), Yamazaki
patent: 6345040 (2002-02-01), Stephens et al.
patent: 2004/0196859 (2004-10-01), Benner

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