Data transmission system and interface module and priority gener

Multiplex communications – Wide area network – Packet switching

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36082551, H04J 302

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active

054024234

ABSTRACT:
The interface modules (LIM1, . . , LIM8) control the access of information packets, received via terminal interconnections (TI11, . . . , TI82), to a common databus (DB). This access is for all interface modules granted by means of a grant signal transmitted over a priority bus (AB). Each interface module includes a priority generation module (PG) which determines a priority value (PR1) for this module. Based on this priority value, the interface modules compete with each other to gain access to the databus. The priority value (PR1) is transmitted over the priority bus (AB) and is determined dynamically based on at least one characteristic of the packets, e.g. on the age of the oldest byte of the packets waiting for transmission in the interface module and/or of the type of information contained in the packets. Two embodiments of the priority generation module (PG) are described, one based on a software program and one based on the value, at the time of receipt of a grant signal, of counters associated with each queued packet of the interface module.

REFERENCES:
patent: 5107492 (1992-04-01), Roux et al.
patent: 5115430 (1992-05-01), Hahne et al.
patent: 5121383 (1992-06-01), Golestani
patent: 5237568 (1993-08-01), Woest et al.
GLOBECOM 1990, vol. 3, Dec. 1990, New York, US, pp. 1431-1437, J. Y. Hui et al., "Queueing Strategies for Multicast Packet Switching", p. 1432, left column, line 27-line 45.
IBM Technical Disclosure Bulletin, vol. 27, No. 5, Oct. 1984, New York, US, pp. 3051-3052, P. Borgnis Desbordes et al., "Variable Speed Adapter for Data Transmission", the whole document.

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