Data transmission error control apparatus

Details Data transmission error control apparatus Data transmission error control apparatus

1993-06-22

1996-03-05

Nguyen, Hoa T.

G06F 1314

Patent

active

054974615

ABSTRACT:
A main CPU in a data transmitting section applies a packet number recorded in a packet number memory to a block data when transmitting the latter, and increments and updates the packet number upon completion of the transmission. A sub-CPU in a data receiving section determines whether the packet number applied to the block data received is the updated number or not, in order to determine whether the data is a re-transmission of previous data or a transmission of new data. If the block data received is a re-transmission of previous data, the data received previously is discarded. If the block data received is new data, the data received previously is processed.

REFERENCES:
patent: 4439859 (1984-03-01), Donnan
patent: 4999834 (1991-03-01), Leo et al.
patent: 5335233 (1994-08-01), Nagy
patent: 5384770 (1994-10-01), Mays et al.

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