Cryptography – Communication system using cryptography – Time segment interchange
Reexamination Certificate
2000-12-13
2002-07-02
Barrón, Jr., Gilberto (Department: 2131)
Cryptography
Communication system using cryptography
Time segment interchange
C380S042000, C713S189000, C713S190000
Reexamination Certificate
active
06415030
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a data transformation apparatus and a data transformation method for encryption, decryption of input data and data diffusion in order to protect digital information of communication.
BACKGROUND ART
As a conventional data transformation method for encryption, “FEAL-8 Algorithm” (Fast data Encipherment ALgorithm-8) is disclosed by Miyaguchi et al. (Miyaguchi, Shiraishi, and Shimizu, “FEAL-8 Encipherment Algorithm” NTT Practical Research Report vol. 39, No. 4/5, 1988).
FIG. 29
is a partial diagram of the above “FEAL-8” encipherment algorithm.
In the figure,
1001
and
1002
denote input data of two sequences,
1003
and
1004
denote output data of two sequences, and
1005
,
1006
,
1007
and
1008
denote intermediate data.
1011
,
1012
,
1013
and
1014
respectively show a first key parameter, a second key parameter, a third key parameter and a fourth key parameter. Each of
1021
,
1022
,
1023
and
1024
shows sub-transformation unit of each transforming stage. Each sub-transformation unit includes each of nonlinear transformers
1031
,
1032
,
1033
,
1034
and each of XOR (exclusive OR) circuits
1041
,
1042
,
1043
,
1044
.
An operation will be explained hereinafter. The input data
1001
and
1002
of two sequences are received at the sub-transformation unit
1021
of a first stage to be transformed into new data, that is, the intermediate data
1005
and
1006
of two sequences. The intermediate data is input to the sub-transformation unit
1022
of a second stage to be transformed into new data, that is, the intermediate data
1007
and
1008
. The above operation is repeated eight times in total, and the output data
1003
and
1004
of two sequences are output as the last transformation result from the sub-transformation unit of an eighth stage.
An operation of the sub-transformation unit
1021
of the first stage will be explained for one example of the above sub-transformation units.
The sub-transformation unit
1021
receives the input data
1001
and
1002
of two sequences and outputs the intermediate data
1005
and
1006
of two sequences. As described in detail in the above Practical Research Report, the second input data, that is, the input data
1002
, is divided into byte by byte, and the divided is the XORed with the key parameter. Arithemetic addition is repeated to the data and the divided data is united again. This nonlinear transforming operation is performed in the nonlinear transformer
1031
. The transformed data is XORed with the first input data
1001
. The XORed result is output from the first stage as the second intermediate data
1006
. On the other hand, the second input data
1002
is output as the first intermediate data
1005
without any transformation.
In the second sub-transformation unit
1022
, data is processed as well as in the above procedure and the intermediate data of the second stage is obtained. In the same way, in this example, the processes of eight stages are performed in total. As the result, output data
1003
and
1004
are obtained.
The conventional data transformation apparatus is configured as described above. The transformed data is output only after the nonlinear transformation is completed in one stage of the sub-transformation unit, and is input to the sub-transformation unit of the next stage. Namely, each sub-transformation is performed sequentially and it takes time to perform an entire procedure.
The present invention is provided to solve the above problem. The object of the invention is to perform a plurality of sub-transformations in parallel to increase the processing speed of data transformation such as encryption, decryption and data diffusion. Disclosure of the Invention
The data transformation apparatus of the present invention inputs two arbitrary pieces of data of A input data and B input data to a first unit of the apparatus. A first nonlinear transformation of A input data is performed using a first key parameter and the transformed data is XORed with B input data. The XoRed result is output as B intermediate data. B input data is also output as A intermediate data without any transformation. In a next unit, a second nonlinear transformation of A intermediate data is performed using a second key parameter and the transformed data is XORed with B intermediate data. The XORed result is output as next B intermediate data. B intermediate data output from the first unit is output as next A intermediate data without any transformation. The above two units are connected in a cascade and the last A intermediate data and the last B intermediate data are output as transformation result of the data transformation apparatus.
Further, in the above basic configuration of the apparatus, a set of a first nonlinear transformer and an XOR circuit located between an input side of the first nonlinear transformation and an input side of the second nonlinear transformation is defined as a first sub-transformation unit. Another set of a second nonlinear transformer and an XOR circuit located between the input side of the second nonlinear transformation and the input side of the first nonlinear transformation of the next stage is defined as a second sub-transformation unit. Otherwise, a set of the XOR circuit and the second nonlinear transformer located between an output side of the first nonlinear transformation and an output side of the second nonlinear transformation is defined as the first sub-transformation unit. Another set of the XOR circuit and the first nonlinear transformer located between the output side of the second nonlinear transformation and the output side of the first nonlinear transformation of the next stage is defined as the second sub-transformation unit. Regardless of the definition, a necessary number of the above first sub-transformation units and the second sub-transformation units are alternately connected in a cascade. From the last stage, A intermediate data and B intermediate data output from either of the first and the second sub-transformation units is output as the transformation result of the apparatus.
Further, the nonlinear transformer of each sub-transformation unit has a nest configuration of the basic configuration of data transformation apparatus.
According to a data transformation method of the present invention, two arbitrary pieces of data of A input data and B input data are input. B input data is output as a first A intermediate data at a first step. A nonlinear transformation of A input data is performed using a first key parameter. The transformed data is XORed with B input data and the XORed result is output as a first B intermediate data at a second step. At a third step, the first B intermediate data is input and output as a second A intermediate data. The first A intermediate data is input and a nonlinear transformation of the A intermediate data is performed using a second key parameter. The transformed data is XORed with the first B intermediate data and the XORed result is output as a second B intermediate data at a fourth step. The above steps are repeated from the first step to the fourth step. The above second step or the fourth step should be placed at the last step of the transformation method and the last A intermediate data and the last B intermediate data are output as the transformation result of the whole procedure.
In the above method, an operation order may be changed, that is, a nonlinear transformation and an XOR operation may be altered. The method still have effective steps as the above.
Further, in the above basic configuration of the apparatus, a set of the first nonlinear transformer and the XOR circuit located between the input side of the first nonlinear transformation and the input side of the second nonlinear transformation is defined as the first sub-transformation unit. Another set of the second nonlinear transformer and the XOR circuit located between the input side of the second nonlinear transformation and the input side of the first nonlinear transformation of the next stage is defin
Matsui Mitsuru
Tokita Toshio
Barrón Jr. Gilberto
Jack Todd
Mitsubishi Denki & Kabushiki Kaisha
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