Data transfer using bus address lines

Details Data transfer using bus address lines Data transfer using bus address lines

1991-11-13

1993-12-28

Rudolph, Rebecca L.

Boots, shoes, and leggings

395550, 364DIG1, 3642703, 3642403, 3649342, 36493547, G06F 1300

Patent

active

052747840

ABSTRACT:
A computer system can transfer data between a master subsystem and a slave subsystem on bus address lines as well as bus data lines during a high speed data transfer. Data is clocked during the high speed transfer by a high speed clock signal which is separate from a normal bus clock signal. Data is transferred at the maximum rate which can be handled by both the master subsystem and the slave subsystem.

REFERENCES:
patent: 4144562 (1979-03-01), Cooper
patent: 4232366 (1980-11-01), Levy et al.
patent: 4315308 (1982-02-01), Jackson
patent: 4458308 (1984-07-01), Holtey et al.
patent: 4523274 (1985-06-01), Fukunaga et al.
patent: 4796221 (1989-01-01), Tokumitsu
patent: 4974143 (1990-11-01), Yamada

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