Data transfer using bus address lines

Details Data transfer using bus address lines Data transfer using bus address lines

1989-01-13

1992-04-28

Hecker, Stuart N.

Boots, shoes, and leggings

364DIG1, 364210, 3642103, 364935, 3649354, G06F 100

Patent

active

051094908

ABSTRACT:
A computer system can transfer data between a master subsystem and a slave subsystem on bus address lines as well as bus data lines during a high speed data transfer. Data is clocked during the high speed transfer by a high speed clock signal which is separate from a normal bus clock signal. Data is transferred at the maximum rate which can be handled by both the master subsystem and the slave subsystem.

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Technical Disclosure Bulletin, Apr, 1986, vol. 28, No. 11, pp. 4837-4839.

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