Data transfer system with buffer request including block length

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395876, 39520001, 364DIG1, 364239, 36423951, 3642398, 364230, 364939, 36493981, 364230, 364939, 36493981, G06F 1516, G06F 1202

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055553800

ABSTRACT:
A data transfer system includes a buffer having a plural buffer areas for storing the data blocks transferred from plural central processors, and an external pointer storing an address data corresponding to an initial position of one of the buffer areas where a transferring data block is to be stored therein. The address data stored in the external pointer is renewed in accordance with a length of a data block to be transferred.

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"Automatic Request Response Control Block DMA for High Performance IOP", IBM Technical Disclosure Bulletin, vol. 33, No. 5, Oct. 1990, pp. 401-404.
J. A. Appel et al., "A High Capacity FASTBUS Multiple Event Buffer", IEEE Transactions on Nuclear Science, vol. NS-32, No. 1, Feb. 1985, pp. 105-107 .

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