Data transfer system

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Details

364DIG1, 3642401, 364247, 3642478, 364254, 3642541, 3642402, G06F 1338

Patent

active

053033531

ABSTRACT:
A data bus has a bit length of 2 words, and is divided into two bit groups, each of which corresponds to one word. Therefore, the data bus can simultaneously transfer data of two words. A register, a data operation part of a CPU, a RAM and a ROM is connected to the data bus. Even if there is generated data of two words to be transferred in these registers, the data operation part, the RAM and the ROM, the data bus can simultaneously transfer the data. In order to prevent conflict of data on the data bus, there are provided a bus driver, a multiplexer and a bus selector.

REFERENCES:
patent: 4361869 (1982-11-01), Johnson et al.
patent: 4424561 (1984-01-01), Stanley et al.
patent: 4897783 (1990-01-01), Nay

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