Static information storage and retrieval – Addressing – Sequential
Patent
1995-02-27
1997-01-07
Nguyen, Tan T.
Static information storage and retrieval
Addressing
Sequential
36518912, 365220, 365221, G11C 804
Patent
active
055924360
ABSTRACT:
A data transfer system, comprising: a plurality of data input/output gates arranged by k-unit group by k-unit group in a predetermined sequence; gate selector circuit each arranged for k-unit group of the gates, for selecting the gates in unit of k-unit group; a plurality of data transfer paths for transferring data via the gates selected by the gate selector circuit; a first register group composed of a-units of data registers for transferring data simultaneously to and from the data transfer paths, the a-unit data registers being serial-accessed in a constant sequence; and a scrambler circuit for designating any required data input/output gates and for further selectively connecting the data transfer paths connected to said designated data input/output gates with the data registers so that the data transfer paths connected to the designated input/output gates can be connected to the serial-accessible registers in a predetermined sequence, when the number of the data transfer paths is (L.times.k) under the following conditions: ##EQU1## where L denotes a maximum number of the gate selecting means selectable simultaneously.
REFERENCES:
patent: 4644502 (1987-02-01), Kawashima
patent: 4855959 (1989-08-01), Kobayashi
patent: 5257255 (1993-10-01), Miyamoto
patent: 5323358 (1994-06-01), Toda et al.
Kabushiki Kaisha Toshiba
Nguyen Tan T.
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