Data transfer system

Communications: electrical – Continuously variable indicating – With meter reading

Patent

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Details

34082565, 3408252, 34082521, H04B 300, H04B 1300

Patent

active

058183515

ABSTRACT:
A data transfer system is disclosed in which digital signal conditions existing in different positions of series-connected units can serially be transferred, the transfer of the signal conditions being effected in synchronism with clock pulses emitted by a clock pulse generator 300 via a common data transfer line 71, the clock pulses being transferred via a common clock pulse line 70, and release signals between the units being transferred via release lines 72. The data transfer of signal conditions of units featuring transmitter/receiver means 1, 1' is controlled by suppressing predetermined clock pulses originating in the clock generator 301 of a signal processing means 2, the clock generator 301 being arranged in a bus control means 3 of the signal processing means 2 together with a process control means 30, said clock generator and said process control means being controllable by means of a microprocessor unit 4 of the signal processing means. The positions of the transmitter/receiver means 1, 1' are associated with successive stages 91, 92, 93, 94, 95, 96, 97, 98 for sensors 5 and actors 6. By means of the clock generator 301, the clock pulses for the transfer of signal conditions are suppressed for three clock periods for monitoring sensors 5, for two clock periods for controlling actors 6, and for one clock period for advancing from one stage to another 91, 92, 93, 94, 95, 96, 97, 98. The transmitter/receiver means 1, 1' features a process control means 10 in which a clock pulse monitoring means 101, 102, 103 and a transmitter/receiver control means 100 are arranged to detect the suppression of clock pulses, the suppression of one, two or three clock periods being recognized by means of the clock pulse monitoring circuit. The signal conditions of each of the stages 91, 92, 93, 94 having sensors 5 and/or of each of the stages 95, 96, 97, 98 having actors 6 can be monitored, controlled and evaluated with predetermined frequency by means of the microprocessor unit 4.

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patent: 4578797 (1986-03-01), Satoh et al.
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patent: 4951142 (1990-08-01), Glaab et al.
patent: 5086500 (1992-02-01), Greub

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