Data transfer speed control apparatus capable of varying speed o

Details Data transfer speed control apparatus capable of varying speed o Data transfer speed control apparatus capable of varying speed o

1987-12-16

1990-06-05

Heckler, Thomas M.

Boots, shoes, and leggings

3642384, 3642601, 3642281, 364243, G06F 506, G06F 300

Patent

active

049319248

ABSTRACT:
A data transfer speed control apparatus for effecting data transfer between semiconductor storage devices and CPU channel devices having maximum transfer speeds different from each other has connection line setting sections indicating the maximum transfer speeds of the semiconductor storage devices and the CPU channel devices. When data transfer between one of the semiconductor storage devices and one of the channel devices is to be made, a transfer speed determining section determines an actual speed of data transfer between the one semiconductor storage device and the one channel device on the basis of the indicated maximum transfer speeds of the one semiconductor storage device and the one channel device to be that one of both the maximum transfer speeds which is lower. The transfer speed of the semiconductor storage device and the channel device is set to the transfer speed determined by the transfer speed determining section.

REFERENCES:
patent: 3937938 (1976-02-01), Matthews
patent: 3980993 (1976-09-01), Bredart et al.
patent: 4344132 (1982-08-01), Dixon et al.
Microprocessor Interfacing, 1982-Prof. Andrew C. Staugaard, Jr.

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