Data transfer operations between two asynchronous buses

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Details

395308, 395280, 364DIG1, 3642403, G06F 1314

Patent

active

054816815

ABSTRACT:
A technique for permitting data transfers between a high speed bus and a low speed bus which operate independently and asynchronously wherein when the low speed bus requires access to the high speed bus, the busy status of the latter bus is determined and transfers are made to the high speed bus at high speed when such bus is not busy. When the high speed bus requires access to the low speed bus, if the low speed bus is busy the requesting master on the high speed bus is temporarily placed in a pending status and is removed from its tenure on the high speed bus, so that the high speed bus is free to handle other requests. When the low speed bus is free, the highest priority pending requestor is provided access to the low speed bus on a priority basis over all then current requestors.

REFERENCES:
patent: 3940743 (1976-02-01), Fizgerald
patent: 4041472 (1977-08-01), Shah et al.
patent: 4047162 (1977-09-01), Dorey et al.
patent: 4396995 (1983-08-01), Gray
patent: 4716525 (1987-12-01), Gilanyi et al.
patent: 4896257 (1990-01-01), Roberts
patent: 5003463 (1991-03-01), Coyle et al.

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