Data transfer method for a bus device in a computer system by pl

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395824, G06F 1338

Patent

active

059742399

ABSTRACT:
A PCI/ISA computer system architecture is disclosed in which the ISA legacy circuitry (such as the interrupt request controller, DMA controller, and timer counter unit) is integrated within the system controller coupling the processor and PCI buses. Accordingly, the ISA bridge coupling the PCI and ISA buses is simplified relative to prior art PCI-ISA bridges. A high speed communications channel between the system controller and the ISA bridge is established by first placing an address on the PCI bus which is recognizable only by the system controller and the ISA bridge. Data transfer then occurs within standard PCI protocols, but need only require a subset of the A/D lines. Backwards compatibility is maintained, while system performance is improved and system cost is reduced.

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