Data transfer control unit

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Details

3642397, 3642283, 3642601, G06F 1314, G06F 1516

Patent

active

050579983

ABSTRACT:
In case of performing the data transfer between 2 systems respectively operating under different CPUs, it has been traditionally done through I/O interface, and the control of the I/O interface has been done by said CPU.
The present invention has been made to implement the data transfer between 2 systems using the data transfer interface equipped with the controller to give and take the dual port memory, and the data between the dual port memory and the outside. Writing from the outside into the dual port memory in this case has been made to be indicated by the flag 1, by which the load of the data transfer of CPU itself is to be retrenched.

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patent: 4363093 (1982-12-01), Davis et al.
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patent: 4486828 (1984-12-01), Kitamura et al.
patent: 4641238 (1987-02-01), Kneib
patent: 4700292 (1987-10-01), Campanini
patent: 4724520 (1988-02-01), Athanas et al.
patent: 4764896 (1988-08-01), Freimark et al.
patent: 4796232 (1989-01-01), House
"16-Bit MC68120 Microprocessor's User's Manual", 2nd Ed., Motorola Semiconductors Japan Inc., '81.

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