Data transfer apparatus having a transferable data counter

Details Data transfer apparatus having a transferable data counter Data transfer apparatus having a transferable data counter

1990-01-02

1992-04-28

Chan, Eddie P.

Boots, shoes, and leggings

364DIG1, 3642423, 364260, 3642601, G06F 1300

Patent

active

051095017

ABSTRACT:
A data transfer apparatus is capable of DMA-transferring the transferable data sequentially generated by a processor. In the data transfer apparatus is provided a counter or an address latch for storing data corresponding to the upper limit (or lower limit) of the address of the transferable data. The content of this counter or latch and the content of the DMA address counter are sequentially compared and transferred, and when these values finally become equal to each other and there is no longer new transferable data, the DMA transfer is stopped and a transfer request is retained. By this constitution, the data transfer between the processor and a device which requires the data generated by the processor may be done instantly and asynchronously.

REFERENCES:
patent: 3629848 (1971-12-01), Gibson
patent: 4065810 (1977-12-01), Cramer et al.
patent: 4156904 (1979-05-01), Minowa et al.
patent: 4419728 (1983-12-01), Larson
patent: 4543627 (1985-09-01), Schwab

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