Data synchronization across an asynchronous boundary using,...

Details Data synchronization across an asynchronous boundary using,... Data synchronization across an asynchronous boundary using,...

2007-06-12

2007-06-12

Fan, Chieh M. (Department: 2611)

Pulse or digital communications

Synchronizers

C375S355000, C375S370000, C375S373000, C375S375000, C327S003000, C327S007000, C327S040000, C327S042000, C331S025000

Reexamination Certificate

active

10371220

ABSTRACT:
Additional information on the phase of an external clock signal is obtained by using clock signals to determine if a phase difference between an external clock signal and a first internal sampling clock signal is less than a pre-selected value. If the system determines that the phase difference is less than a pre-selected value, one embodiment samples the incoming data with a second internal sampling clock signal, having a selected phase relationship to the first internal sampling clock signal, such as ½ a clock period out of phase. By maintaining sufficient phase difference between the active edge of the external clock and the active edge of the internal sampling clock, the embodiment provides a sufficient setup/hold margin to avoid a metastability or other problem in a subsystem receiving data across an asynchronous boundary.

REFERENCES:
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patent: 6008680 (1999-12-01), Kyles et al.
patent: 6639956 (2003-10-01), Song
patent: 6724683 (2004-04-01), Liao
patent: 6949958 (2005-09-01), Zerbe et al.
patent: 2002/0131539 (2002-09-01), Li et al.
patent: 2003/0141908 (2003-07-01), Stong

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