Data sync acquisition in an asynchronous binary address decoder

Details Data sync acquisition in an asynchronous binary address decoder Data sync acquisition in an asynchronous binary address decoder

1977-04-29

1979-04-24

Safourek, Benedict V.

Telegraphy

Systems

Line-clearing and circuit maintenance

340167R, H04L 700

Patent

active

041513673

ABSTRACT:
Synchronization for data sampling pulses in a two-way alphanumeric data terminal is provided by utilization of signals present in the page address decoder circuitry. Microprocessor power-up timing is also obtained from the same signals.

REFERENCES:
patent: 4010323 (1977-03-01), Peck
patent: 4010421 (1977-03-01), Lind

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