Data storage unit

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328 59, G06F 104

Patent

active

045758158

ABSTRACT:
In a data storage unit, internal timing signals are produced by scanning a writable control memory. Thus, the timing of the storage unit can easily be varied, simply by re-writing the contents of the control memory. This allows the use of a faster clock rate without the necessity for complete redesign of the storage unit. The basic clock period is sub-divided into a number of sub-periods, allowing the timing signals to be adjusted with an accuracy better than one clock period.

REFERENCES:
patent: 3443070 (1969-05-01), Derby et al.
patent: 3866022 (1975-02-01), Fletcher et al.
patent: 4063308 (1977-12-01), Collins et al.
patent: 4095265 (1978-06-01), Vrba
patent: 4122309 (1978-10-01), Jacobsen
patent: 4165490 (1979-08-01), Howe, Jr. et al.
patent: 4257108 (1981-03-01), Igel
patent: 4321687 (1982-03-01), Parsons et al.
MC 68540-Error Detection and Correction Circuit, Product Preview, Motorola, 1981 pp. 1-8.

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