Data storage security apparatus and method which erases memory a

Details Data storage security apparatus and method which erases memory a Data storage security apparatus and method which erases memory a

1995-12-29

1998-05-26

Kim, Matthew M.

395750, 395186, G06F 1214

Patent

active

057581215

ABSTRACT:
When a connector of a data storage device 10 is connected to a connector 104 of a data processor 100, a power is supplied to a microprocessor 24, and the data storage device 10 sends a discrimination signal to the data processor 100. If the discrimination signal is decided to be a prescribed signal, the data processor 100 sends a detection signal to the data storage device 10. If the detection signal is not received or it is not decided to be a prescribed one, the microprocessor 24 makes a card mode controller 16 inactive to inhibit data read from a memory section 14, and it vanishes the data stored in the memory section 14.

REFERENCES:
patent: 5016223 (1991-05-01), Kimura et al.
patent: 5237609 (1993-08-01), Kimura
patent: 5239166 (1993-08-01), Graves
patent: 5265048 (1993-11-01), Kimura
patent: 5361228 (1994-11-01), Adachi et al.
patent: 5432939 (1995-07-01), Blackledge, Jr. et al.
patent: 5572696 (1996-11-01), Sonobe
patent: 5579502 (1996-11-01), Konishi et al.

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