Data storage control circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By pulse width or spacing

Reexamination Certificate

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Details

C327S141000

Reexamination Certificate

active

06249152

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a data storage control circuit for controlling a so-called capture function where a counter is built into a microcomputer or a microprocessor and data of the counter (count information) is stored in a register based on arrival of an input signal from the outside.
2. Description of the Related Art
Microcomputers and microprocessors include data storage means (for example, read/write memory) for storing various data and central processing units (hereinafter referred to as “CPUs”) for controlling operation of these data storage means and controlling arithmetic processing etc. of this data, and instruction execution means etc.
Execution of operations with respect to the CPU is carried out by instruction execution means. Instruction execution means consist of program memory for storing instructions to be executed, address counters for reading desired instructions from program memory and instruction decoders etc. for decoding instructions that are read out. Reading of instructions and decoding are carried out based on a clock signal having a prescribed clock period.
Microcomputers and microprocessors process data by executing instructions in a prescribed order based on the clock signal. Input signals are therefore inputted from an external terminal in a manner that is asynchronous with the operation of the microcomputer or microprocessor in order to carry out interrupt process requests etc. and it is therefore necessary to confirm the timing of the arrival of this input signal in a reliable manner. Microcomputers and microprocessors are therefore provided with a capture function for this purpose.
A capture function is a function for storing the output of a counter counting the clock signal in a prescribed register in accordance with the arrival of the input signal (i.e. the arrival of an edge of the input signal that is the timing of a change in the voltage level of the input signal) inputted from the external terminal.
The timing of the arrival of the input signal inputted from the external terminal can therefore be accurately known by confirming the contents stored in the register (the count value of the counter).
As the capture function operates in response to the arrival of the input signal inputted from the external terminal, when noise occurs in the input signal the contents of the counter become stored in the register in response to changes in the voltage level due to this noise. In these cases, the timing of the arrival of the input signal from the external terminal cannot be accurately confirmed.
Typically, a method where an analog filter is provided and a capture function is executed based on an input signal from the external terminal that passes via the filter has been considered as a method of removing signal noise.
When an analog filter is used, small amounts of noise of a few nanoseconds can easily be eliminated but an analog filter structure with a resistor element having a large resistance and a capacitor having a large capacitance is required for large amounts of noise of a few microseconds or more. It then becomes difficult to confirm the arrival of the input signal in an accurate manner because of increases in the circuit surface area for the analog filter and increases in cost, together with signal delays due to increases in the resistance of the resistor and increases in the capacitance of the capacitor.
It is therefore the object of the present invention to provided a data storage control circuit capable of exerting control in such a manner as to ensure accurate execution of a capture function even if noise occurs in an input signal subjected to monitoring.
It is a further object of the present invention to provide a data storage control circuit capable of dramatically reducing increases in circuit surface area and costs and capable of exerting control in such a manner as to achieve reliable confirmation of the arrival of an input signal.
SUMMARY OF THE INVENTION
In order to achieve the aforementioned objects, in the present invention, there is provided a data storage control circuit for storing data outputted from a counter circuit in a storage circuit based on changes in a logic level of an input signal, said data storage control circuit comprising a digital filter for sampling the input signal and outputting a control signal for changing a logic level based on the logic level of the input signal sampled a plurality of times and a sense circuit for sensing changes in a logic level of the control signal and controlling storage of data outputted from the counter circuit to the storage circuit.
Further, the digital filter of the present invention samples the voltage level of the input signal upon every transition from a first logic level to a second logic level of a sampling clock signal and stores data outputted from the count circuit in the storage circuit when the same logic level is sampled for the input signal m times (where m is a positive integer of two or more).


REFERENCES:
patent: 5136382 (1992-08-01), Meyer
patent: 5267251 (1993-11-01), Lenoir et al.
patent: 6118284 (2000-09-01), Ghoshal et al.

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